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authorTzafrir Cohen <tzafrir.cohen@xorcom.com>2010-07-14 10:28:10 +0000
committerTzafrir Cohen <tzafrir.cohen@xorcom.com>2010-07-14 10:28:10 +0000
commitdefface6c1ae493aae5c862baff7cde20882adab (patch)
tree81765f7ea4034108033a291f95987edce8a0f6d2 /drivers/dahdi/xpp
parentdd37c83cf0a055e9c08a2cda390c0cb5d6cc22f2 (diff)
Set Astribank PRI before initialization
This avoids most cases of sending garbage at startup by setting each port to tristate mode at init time (in the init script) and enable it back at DAHDI_STARTUO (end of dahdi_cfg). Upgrade note: if you have upgraded the files (including init script) but old module is still loaded, you may end up with the port not getting ever enabled and the line practically dead. In such a case, reload the new module. git-svn-id: http://svn.asterisk.org/svn/dahdi/linux/trunk@8922 a0bf4364-ded3-4de4-8d8a-66a801d63aff
Diffstat (limited to 'drivers/dahdi/xpp')
-rw-r--r--drivers/dahdi/xpp/card_pri.c3
-rwxr-xr-xdrivers/dahdi/xpp/init_card_4_303
2 files changed, 5 insertions, 1 deletions
diff --git a/drivers/dahdi/xpp/card_pri.c b/drivers/dahdi/xpp/card_pri.c
index 4cdbe6f..584a17a 100644
--- a/drivers/dahdi/xpp/card_pri.c
+++ b/drivers/dahdi/xpp/card_pri.c
@@ -302,6 +302,8 @@ struct pri_leds {
#define REG_PC3 0x82 /* Port Configuration 3 */
#define REG_PC4 0x83 /* Port Configuration 4 */
+#define REG_XPM2 0x28 /* Transmit Pulse Mask 2 */
+
#define VAL_PC_SYPR 0x00 /* Synchronous Pulse Receive (Input, low active) */
#define VAL_PC_GPI 0x90 /* General purpose input */
#define VAL_PC_GPOH 0x0A /* General Purpose Output, high level */
@@ -1522,6 +1524,7 @@ static int pri_startup(struct dahdi_span *span)
// Turn on all channels
CALL_XMETHOD(XPD_STATE, xpd->xbus, xpd, 1);
set_rbslines(xpd, 0);
+ write_subunit(xpd, REG_XPM2, 0x00);
return 0;
}
diff --git a/drivers/dahdi/xpp/init_card_4_30 b/drivers/dahdi/xpp/init_card_4_30
index 97f4064..e417196 100755
--- a/drivers/dahdi/xpp/init_card_4_30
+++ b/drivers/dahdi/xpp/init_card_4_30
@@ -240,13 +240,14 @@ sub port_setup($) {
my $portno = $port->{PORT_NUM};
my $pri_protocol = $port->get_pri_protocol;
+ PRI::gen "$portno WD 28 40"; # XPM2.XLT Tristate
+
my $cmr5 = sprintf("%x", ($portno << 5));
PRI::gen "$portno WD 42 $cmr5"; # CMR5.DRSS=portno
PRI::gen "$portno WD 26 F6"; # XPM0: Pulse Shape Programming for R1=18Ohms
PRI::gen "$portno WD 27 02"; # XPM1: ...3V Pulse Level at the line (Vp-p=6v)
- PRI::gen "$portno WD 28 00"; # XPM2: ~XLT (transmit line is not in the high impedance state)
# if (unchannelized)
#PRI::gen "$portno WD 1F 22"; # LOOP (Channel Looback):