diff options
| author | Tzafrir Cohen <tzafrir.cohen@xorcom.com> | 2011-11-30 10:22:01 +0000 |
|---|---|---|
| committer | Tzafrir Cohen <tzafrir.cohen@xorcom.com> | 2011-11-30 10:22:01 +0000 |
| commit | b3cf818e41975f5b97018dc852346545d3ebe02b (patch) | |
| tree | d1ce1bd2998b55c6fc965a784139602f2fb059dc | |
| parent | 64985d187c21c4c8a511b7b5893c0906283aeebe (diff) | |
xpp: pri: fix RS1 init in E1 CAS mode
Force some reserved bits to really be 1 in E1 mode (otherwise
terrorists will win).
(Closes issue DAHLIN-264)
Signed-off-by: Oron Peled <oron.peled@xorcom.com>
git-svn-id: http://svn.asterisk.org/svn/dahdi/linux/branches/2.5@10353 a0bf4364-ded3-4de4-8d8a-66a801d63aff
| -rw-r--r-- | drivers/dahdi/xpp/card_pri.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/dahdi/xpp/card_pri.c b/drivers/dahdi/xpp/card_pri.c index 0ec7414..9c7a0e5 100644 --- a/drivers/dahdi/xpp/card_pri.c +++ b/drivers/dahdi/xpp/card_pri.c @@ -1019,6 +1019,17 @@ static int pri_lineconfig(xpd_t *xpd, int lineconfig) } #endif if(force_cas) { + if(priv->pri_protocol == PRI_PROTO_E1) { + int rs1 = 0x0B; + + /* + * Set correct X1-X3 bits in the E1 CAS MFAS + * They are unused in E1 and should be 1 + */ + XPD_DBG(GENERAL, xpd, "%s: rs1(0x%02X) = 0x%02X\n", + __FUNCTION__, REG_RS1_E, rs1); + write_subunit(xpd, REG_RS1_E, rs1); + } xsp |= REG_XSP_E_CASEN; /* Same as REG_FMR5_T_EIBR for T1 */ } XPD_DBG(GENERAL, xpd, "%s: xsp(0x%02X) = 0x%02X\n", __FUNCTION__, REG_XSP_E, xsp); |