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authorShaun Ruffell <sruffell@digium.com>2012-03-21 19:11:53 +0000
committerShaun Ruffell <sruffell@digium.com>2012-03-21 19:11:53 +0000
commit120ddfed50b71256a3fe5f0b718507143faad284 (patch)
tree5f8708ecf16dda832887d528bea582c8090ce245
parent0ba04ec4461afafc664cd89ec0407e51d87d8489 (diff)
wct4xxp: Add compile-time option to disable ASPM for PCIe devices.
Certain BIOSes appear to enable ASPM even though it is not fully supported by the platform. Also, since the PCIe links for TDM cards are always in use it does not make sense to allow them to transition to the disabled state. Just turn off power management on the PCIe links completely. For more information see http://lwn.net/Articles/449448/. Internal-Issue-ID: DAHLIN-283 Signed-off-by: Shaun Ruffell <sruffell@digium.com> Origin: http://svnview.digium.com/svn/dahdi?view=rev&rev=10558 git-svn-id: http://svn.asterisk.org/svn/dahdi/linux/branches/2.6@10566 a0bf4364-ded3-4de4-8d8a-66a801d63aff
-rw-r--r--drivers/dahdi/wct4xxp/base.c21
1 files changed, 21 insertions, 0 deletions
diff --git a/drivers/dahdi/wct4xxp/base.c b/drivers/dahdi/wct4xxp/base.c
index ad7ed97..8791687 100644
--- a/drivers/dahdi/wct4xxp/base.c
+++ b/drivers/dahdi/wct4xxp/base.c
@@ -173,6 +173,15 @@ static inline int t4_queue_work(struct workqueue_struct *wq, struct work_struct
/* #define CONFIG_FORCE_EXTENDED_RESET */
/* #define CONFIG_NOEXTENDED_RESET */
+/*
+ * Uncomment the following definition in order to disable Active-State Power
+ * Management on the PCIe bridge for PCIe cards. This has been known to work
+ * around issues where the BIOS enables it on the cards even though the
+ * platform does not support it.
+ *
+ */
+/* #define CONFIG_WCT4XXP_DISABLE_ASPM */
+
#if defined(CONFIG_FORCE_EXTENDED_RESET) && defined(CONFIG_NOEXTENDED_RESET)
#error "You cannot define both CONFIG_FORCE_EXTENDED_RESET and " \
"CONFIG_NOEXTENDED_RESET."
@@ -378,6 +387,11 @@ struct t4 {
struct spi_state st;
};
+static inline bool is_pcie(const struct t4 *wc)
+{
+ return (wc->devtype->flags & FLAG_EXPRESS) > 0;
+}
+
static inline bool has_e1_span(const struct t4 *wc)
{
return (wc->t1e1) != 0;
@@ -5075,6 +5089,13 @@ t4_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
spin_lock_init(&wc->reglock);
wc->devtype = (const struct devtype *)(ent->driver_data);
+#ifdef CONFIG_WCT4XXP_DISABLE_ASPM
+ if (is_pcie(wc)) {
+ pci_disable_link_state(pdev->bus->self, PCIE_LINK_STATE_L0S |
+ PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
+ };
+#endif
+
if (is_octal(wc))
wc->numspans = 8;
else if (wc->devtype->flags & FLAG_2PORT)