diff options
| author | Tzafrir Cohen <tzafrir.cohen@xorcom.com> | 2009-07-02 20:07:36 +0000 |
|---|---|---|
| committer | Tzafrir Cohen <tzafrir.cohen@xorcom.com> | 2009-07-02 20:07:36 +0000 |
| commit | 84a69f983bf1b085437e03f85e50036da5c6e6c8 (patch) | |
| tree | 5e51a4d1cf194ed01fbe8415047314684f3de11c /drivers/dahdi/wcb4xxp/base.c | |
| parent | 5516a0278308fdb7840ca1e38360eec941aeea40 (diff) | |
More B410P differences: Clock and NT/TE.
* The B410P reads the NT/TE switches the other way around from other
cards.
* Its clock is also 1/2 of that of other cards, which causes wierd PCM
on an unmodified driver.
git-svn-id: http://svn.asterisk.org/svn/dahdi/linux/trunk@6817 a0bf4364-ded3-4de4-8d8a-66a801d63aff
Diffstat (limited to 'drivers/dahdi/wcb4xxp/base.c')
| -rw-r--r-- | drivers/dahdi/wcb4xxp/base.c | 21 |
1 files changed, 18 insertions, 3 deletions
diff --git a/drivers/dahdi/wcb4xxp/base.c b/drivers/dahdi/wcb4xxp/base.c index b4bbd47..8fdffae 100644 --- a/drivers/dahdi/wcb4xxp/base.c +++ b/drivers/dahdi/wcb4xxp/base.c @@ -1443,7 +1443,16 @@ static void hfc_init_all_st(struct b4xxp *b4) s->parent = b4; s->port = i; - nt = ((gpio & (1 << (i + 4))) == 0); /* GPIO=0 = NT mode */ + /* The way the Digium B410P card reads the NT/TE mode + * jumper is the oposite of how other HFC-4S cards do: + * - In B410P: GPIO=0: NT + * - In Junghanns: GPIO=0: TE + */ + if (b4->card_type == B410P) + nt = ((gpio & (1 << (i + 4))) == 0); + else + nt = ((gpio & (1 << (i + 4))) != 0); + s->te_mode = !nt; dev_info(b4->dev, "Port %d: %s mode\n", i + 1, (nt ? "NT" : "TE")); @@ -1799,9 +1808,15 @@ static void b4xxp_init_stage1(struct b4xxp *b4) /* * set up the clock controller - * we have a 24.576MHz crystal, so the PCM clock is 2x the incoming clock. + * B410P has a 24.576MHz crystal, so the PCM clock is 2x the incoming clock. + * Other cards have a 49.152Mhz crystal, so the PCM clock equals incoming clock. */ - b4xxp_setreg8(b4, R_BRG_PCM_CFG, 0x02); + + if (b4->card_type == B410P) + b4xxp_setreg8(b4, R_BRG_PCM_CFG, 0x02); + else + b4xxp_setreg8(b4, R_BRG_PCM_CFG, V_PCM_CLK); + flush_pci(); udelay(100); /* wait a bit for clock to settle */ |