From f5745b1da009e8fec5127d3bf82522ead10580a8 Mon Sep 17 00:00:00 2001 From: Tzafrir Cohen Date: Wed, 14 Jul 2010 10:28:10 +0000 Subject: Set Astribank PRI before initialization This avoids most cases of sending garbage at startup by setting each port to tristate mode at init time (in the init script) and enable it back at DAHDI_STARTUO (end of dahdi_cfg). Upgrade note: if you have upgraded the files (including init script) but old module is still loaded, you may end up with the port not getting ever enabled and the line practically dead. In such a case, reload the new module. git-svn-id: http://svn.asterisk.org/svn/dahdi/linux/trunk@8922 a0bf4364-ded3-4de4-8d8a-66a801d63aff --- drivers/dahdi/xpp/init_card_4_30 | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'drivers/dahdi/xpp/init_card_4_30') diff --git a/drivers/dahdi/xpp/init_card_4_30 b/drivers/dahdi/xpp/init_card_4_30 index 97f4064..e417196 100755 --- a/drivers/dahdi/xpp/init_card_4_30 +++ b/drivers/dahdi/xpp/init_card_4_30 @@ -240,13 +240,14 @@ sub port_setup($) { my $portno = $port->{PORT_NUM}; my $pri_protocol = $port->get_pri_protocol; + PRI::gen "$portno WD 28 40"; # XPM2.XLT Tristate + my $cmr5 = sprintf("%x", ($portno << 5)); PRI::gen "$portno WD 42 $cmr5"; # CMR5.DRSS=portno PRI::gen "$portno WD 26 F6"; # XPM0: Pulse Shape Programming for R1=18Ohms PRI::gen "$portno WD 27 02"; # XPM1: ...3V Pulse Level at the line (Vp-p=6v) - PRI::gen "$portno WD 28 00"; # XPM2: ~XLT (transmit line is not in the high impedance state) # if (unchannelized) #PRI::gen "$portno WD 1F 22"; # LOOP (Channel Looback): -- cgit v1.2.3