diff options
| author | Kevin P. Fleming <kpfleming@digium.com> | 2007-01-18 21:06:01 +0000 |
|---|---|---|
| committer | Tzafrir Cohen <tzafrir.cohen@xorcom.com> | 2011-02-27 21:09:14 +0200 |
| commit | ef7d0400b4b0ea8ad3bf8e3133c3fe5d9cb39fa7 (patch) | |
| tree | 0dbcc06de0849d7111c041ec128c441da02919a7 /software/include/oct6100api/oct6100_defines.h | |
| parent | 6c52d763eb9f6887ce7d09bb3b5913c80a816674 (diff) | |
update to PR47, and update test application to use GetCapacityPins
git-svn-id: http://svn.asterisk.org/svn/octasic_api/oct612x/trunk@23 537310ab-6354-42db-a3cc-247b777f7be6
Diffstat (limited to 'software/include/oct6100api/oct6100_defines.h')
| -rw-r--r-- | software/include/oct6100api/oct6100_defines.h | 31 |
1 files changed, 25 insertions, 6 deletions
diff --git a/software/include/oct6100api/oct6100_defines.h b/software/include/oct6100api/oct6100_defines.h index 1d35381..abe1590 100644 --- a/software/include/oct6100api/oct6100_defines.h +++ b/software/include/oct6100api/oct6100_defines.h @@ -22,9 +22,9 @@ You should have received a copy of the GNU General Public License along with the OCT6100 GPL API; if not, write to the Free Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.7 -$Octasic_Release: OCT612xAPI-01.00-PR43 $ +$Octasic_Release: OCT612xAPI-01.00-PR47 $ -$Octasic_Revision: 166 $ +$Octasic_Revision: 169 $ \*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ @@ -496,16 +496,35 @@ $Octasic_Revision: 166 $ #define cOCT6100_TONE_EVENT_WRITE_PTR_REG 0x722 #define cOCT6100_TONE_EVENT_READ_PTR_REG 0x720 -/* Special tone IDs. */ +/* Special Signaling tone IDs. */ +#define cOCT6100_TONE_SIN_SYSTEM7_2000 0x20000023 +#define cOCT6100_TONE_SIN_SYSTEM7_1780 0x20000024 +#define cOCT6100_TONE_ROUT_G168_2100GB_ON 0x10000000 +#define cOCT6100_TONE_ROUT_G168_2100GB_WSPR 0x10000002 +#define cOCT6100_TONE_ROUT_G168_1100GB_ON 0x10000004 +#define cOCT6100_TONE_ROUT_G168_2100GB_ON_WIDE_A 0x10000005 +#define cOCT6100_TONE_ROUT_G168_2100GB_ON_WIDE_B 0x10000006 +#define cOCT6100_TONE_ROUT_G168_2100GB_WSPR_WIDE 0x10000008 +#define cOCT6100_TONE_SOUT_G168_2100GB_ON 0x40000000 +#define cOCT6100_TONE_SOUT_G168_2100GB_WSPR 0x40000002 +#define cOCT6100_TONE_SOUT_G168_1100GB_ON 0x40000004 +#define cOCT6100_TONE_SOUT_G168_2100GB_ON_WIDE_A 0x40000005 +#define cOCT6100_TONE_SOUT_G168_2100GB_ON_WIDE_B 0x40000006 +#define cOCT6100_TONE_SOUT_G168_2100GB_WSPR_WIDE 0x40000008 +#define cOCT6100_TONE_SIN_SYSTEM5_2400 0x20000020 +#define cOCT6100_TONE_SIN_SYSTEM5_2600 0x20000021 +#define cOCT6100_TONE_SIN_SYSTEM5_2400_2600 0x20000022 -/* System 5/7 Section */ -#define cOCT6100_TONE_SIN_SYSTEM7_2000 0x20000023 -#define cOCT6100_TONE_SIN_SYSTEM7_1780 0x20000024 #define cOCT6100_CHIP_ID_REVISION_REG 0x17E /* BOOT type. */ #define cOCT6100_AF_BOOT_TYPE 0x5 #define cOCT6100_PRODUCTION_BOOT_TYPE 0x7 +#define cOCT6100_PRODUCTION_SHORT_BOOT_TYPE 0x8 + +/*Production Bist Modes*/ +#define cOCT6100_PRODUCTION_BIST_STANDARD 0x0 +#define cOCT6100_PRODUCTION_BIST_SHORT 0x1 /* Interrupt register masks.*/ #define cOCT6100_INTRPT_MASK_REG_102H 0x0001 |