diff options
Diffstat (limited to 'software/octdeviceapi/oct6100api/oct6100_api/oct6100_interrupts.c')
| -rw-r--r-- | software/octdeviceapi/oct6100api/oct6100_api/oct6100_interrupts.c | 113 |
1 files changed, 109 insertions, 4 deletions
diff --git a/software/octdeviceapi/oct6100api/oct6100_api/oct6100_interrupts.c b/software/octdeviceapi/oct6100api/oct6100_api/oct6100_interrupts.c index 6900dfd..4d0cf79 100644 --- a/software/octdeviceapi/oct6100api/oct6100_api/oct6100_interrupts.c +++ b/software/octdeviceapi/oct6100api/oct6100_api/oct6100_interrupts.c @@ -2,7 +2,7 @@ File: oct6100_interrupts.c - Copyright (c) 2001-2006 Octasic Inc. + Copyright (c) 2001-2007 Octasic Inc. Description: @@ -23,9 +23,9 @@ You should have received a copy of the GNU General Public License along with the OCT6100 GPL API; if not, write to the Free Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -$Octasic_Release: OCT612xAPI-01.00-PR47 $ +$Octasic_Release: OCT612xAPI-01.00-PR48 $ -$Octasic_Revision: 75 $ +$Octasic_Revision: 78 $ \*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ @@ -330,7 +330,7 @@ UINT32 Oct6100ApiIsrHwInit( return ulResult; WriteParams.ulWriteAddress = 0x504; - WriteParams.usWriteData = 0x0001; + WriteParams.usWriteData = 0x0002; mOCT6100_DRIVER_WRITE_API( WriteParams, ulResult ) if ( ulResult != cOCT6100_ERR_OK ) return ulResult; @@ -441,6 +441,12 @@ UINT32 Oct6100InterruptConfigureSer( f_pIntrptConfig->ulErrorH100Timeout = ((f_pIntrptConfig->ulErrorH100Timeout + 9) / 10) * 10; pIntrptConfig->ulErrorH100TimeoutMclk = f_pIntrptConfig->ulErrorH100Timeout * pIntrptManage->ulNumMclkCyclesIn1Ms; + + /*Clear all interrupts that were already enabled*/ + ulResult = Oct6100ApiClearEnabledInterrupts( f_pApiInstance ); + if ( ulResult != cOCT6100_ERR_OK ) + return ulResult; + /* Before writing the new configuration to the chip's registers, make sure that any */ /* interrupts which are either disabled or have no timeout period are not on the */ /* disabled interrupt list. */ @@ -495,6 +501,7 @@ UINT32 Oct6100InterruptConfigureSer( pIntrptManage->byErrorH100State = cOCT6100_INTRPT_ACTIVE; } + /* Write to the interrupt registers to update the state of each interrupt group. */ ulResult = Oct6100ApiWriteIeRegs( f_pApiInstance ); if ( ulResult != cOCT6100_ERR_OK ) @@ -504,6 +511,104 @@ UINT32 Oct6100InterruptConfigureSer( } #endif +/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*\ + +Function: Oct6100ApiClearEnabledInterrupts + +Description: Disabled interruption are not reported but still available. This + function will clear the interrupts that were disabled and wish + to enable now. + +------------------------------------------------------------------------------- +| Argument | Description +------------------------------------------------------------------------------- +f_pApiInstance Pointer to API instance. This memory is used to keep + the present state of the chip and all its resources. + +f_pIntrptConfig Pointer to interrupt configuration structure. +f_pIntrptManage Pointer to interrupt manager structure. +\*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ + +#if !SKIP_Oct6100ApiClearEnabledInterrupts +UINT32 Oct6100ApiClearEnabledInterrupts( + IN tPOCT6100_INSTANCE_API f_pApiInstance ) +{ + + tPOCT6100_SHARED_INFO pSharedInfo; + tOCT6100_WRITE_PARAMS WriteParams; + tPOCT6100_API_INTRPT_CONFIG pIntrptConfig; + tPOCT6100_API_INTRPT_MANAGE pIntrptManage; + UINT32 ulResult; + + /* Get local pointer to shared portion of instance. */ + pSharedInfo = f_pApiInstance->pSharedInfo; + + /* Set the process context and user chip ID parameters once and for all. */ + WriteParams.pProcessContext = f_pApiInstance->pProcessContext; + + WriteParams.ulUserChipId = pSharedInfo->ChipConfig.ulUserChipId; + + /* Copy the configuration to the API instance. */ + pIntrptConfig = &f_pApiInstance->pSharedInfo->IntrptConfig; + pIntrptManage = &f_pApiInstance->pSharedInfo->IntrptManage; + + if ( pIntrptConfig->byFatalGeneralConfig != cOCT6100_INTERRUPT_DISABLE && + pIntrptManage->byFatalGeneralState != cOCT6100_INTRPT_DISABLED ) + { + WriteParams.ulWriteAddress = 0x102; + WriteParams.usWriteData = cOCT6100_INTRPT_MASK_REG_102H; + mOCT6100_DRIVER_WRITE_API( WriteParams, ulResult ) + if ( ulResult != cOCT6100_ERR_OK ) + return ulResult; + + WriteParams.ulWriteAddress = 0x202; + WriteParams.usWriteData = 0x1800; + mOCT6100_DRIVER_WRITE_API( WriteParams, ulResult ) + if ( ulResult != cOCT6100_ERR_OK ) + return ulResult; + + WriteParams.ulWriteAddress = 0x502; + WriteParams.usWriteData = cOCT6100_INTRPT_MASK_REG_502H; + mOCT6100_DRIVER_WRITE_API( WriteParams, ulResult ) + if ( ulResult != cOCT6100_ERR_OK ) + return ulResult; + } + + if ( pIntrptConfig->byErrorMemoryConfig != cOCT6100_INTERRUPT_DISABLE && + pIntrptManage->byErrorMemoryState != cOCT6100_INTRPT_DISABLED ) + { + WriteParams.ulWriteAddress = 0x202; + WriteParams.usWriteData = cOCT6100_INTRPT_MASK_REG_202H; + mOCT6100_DRIVER_WRITE_API( WriteParams, ulResult ) + if ( ulResult != cOCT6100_ERR_OK ) + return ulResult; + } + + if ( pIntrptConfig->byErrorH100Config != cOCT6100_INTERRUPT_DISABLE && + pIntrptManage->byErrorH100State != cOCT6100_INTRPT_DISABLED ) + { + WriteParams.ulWriteAddress = 0x302; + WriteParams.usWriteData = cOCT6100_INTRPT_MASK_REG_302H; + mOCT6100_DRIVER_WRITE_API( WriteParams, ulResult ) + if ( ulResult != cOCT6100_ERR_OK ) + return ulResult; + } + + if ( pIntrptConfig->byErrorOverflowToneEventsConfig != cOCT6100_INTERRUPT_DISABLE && + pIntrptManage->byErrorOverflowToneEventsState != cOCT6100_INTRPT_DISABLED ) + { + WriteParams.ulWriteAddress = 0x702; + WriteParams.usWriteData = cOCT6100_INTRPT_MASK_REG_702H; + mOCT6100_DRIVER_WRITE_API( WriteParams, ulResult ) + if ( ulResult != cOCT6100_ERR_OK ) + return ulResult; + } + + + return cOCT6100_ERR_OK; + +} +#endif /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*\ |