From 433987eb1e7f7efdb55c2d6fc50f29d73c83aed0 Mon Sep 17 00:00:00 2001 From: Octasic Inc Date: Wed, 11 Jul 2007 17:37:40 +0300 Subject: importing OCT612x-01.00-PR48 --- .../oct6100api/oct6100_api/oct6100_chip_open.c | 156 ++++++++++++++++----- 1 file changed, 124 insertions(+), 32 deletions(-) (limited to 'software/octdeviceapi/oct6100api/oct6100_api/oct6100_chip_open.c') diff --git a/software/octdeviceapi/oct6100api/oct6100_api/oct6100_chip_open.c b/software/octdeviceapi/oct6100api/oct6100_api/oct6100_chip_open.c index f25c28c..47ea357 100644 --- a/software/octdeviceapi/oct6100api/oct6100_api/oct6100_chip_open.c +++ b/software/octdeviceapi/oct6100api/oct6100_api/oct6100_chip_open.c @@ -2,7 +2,7 @@ File: oct6100_chip_open.c - Copyright (c) 2001-2006 Octasic Inc. + Copyright (c) 2001-2007 Octasic Inc. Description: @@ -24,9 +24,9 @@ You should have received a copy of the GNU General Public License along with the OCT6100 GPL API; if not, write to the Free Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -$Octasic_Release: OCT612xAPI-01.00-PR47 $ +$Octasic_Release: OCT612xAPI-01.00-PR48 $ -$Octasic_Revision: 336 $ +$Octasic_Revision: 347 $ \*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ @@ -209,6 +209,7 @@ UINT32 Oct6100ChipOpenDef( /* Configure the soft tone event buffer. */ f_pChipOpen->ulSoftToneEventsBufSize = 2048; f_pChipOpen->fEnableExtToneDetection = FALSE; + f_pChipOpen->fEnable2100StopEvent = FALSE; /* Configure the soft playout event buffer. */ f_pChipOpen->ulSoftBufferPlayoutEventsBufSize = cOCT6100_INVALID_VALUE; @@ -274,7 +275,7 @@ UINT32 Oct6100ChipOpen( ulResult = Oct6100ApiCheckChipConfiguration( f_pChipOpen ); if ( ulResult != cOCT6100_ERR_OK ) return ulResult; - + /* Check if the host system is multi-process or not and adjust instance accordingly. */ if ( f_pChipOpen->fMultiProcessSystem != TRUE ) { @@ -404,21 +405,11 @@ UINT32 Oct6100ChipOpen( /* Proceed with the rest only if the production BIST has not been requested. */ if ( f_pChipOpen->fEnableProductionBist == FALSE ) { - /* Configure the interrupt registers. */ - ulResult = Oct6100ApiIsrHwInit( f_pApiInstance, &f_pChipOpen->InterruptConfig ); - if ( ulResult != cOCT6100_ERR_OK ) - return ulResult; - /* Initialize the errors counters. */ ulResult = Oct6100ApiChipStatsSwInit( f_pApiInstance ); if ( ulResult != cOCT6100_ERR_OK ) return ulResult; - /* Configure all interrupts of the chip. */ - ulResult = Oct6100InterruptConfigureSer( f_pApiInstance, &f_pChipOpen->InterruptConfig, FALSE ); - if ( ulResult != cOCT6100_ERR_OK ) - return ulResult; - /* Get revision number of chip. */ ulResult = Oct6100ApiGetChipRevisionNum( f_pApiInstance ); if ( ulResult != cOCT6100_ERR_OK ) @@ -450,6 +441,16 @@ UINT32 Oct6100ChipOpen( + + /*Clear all interrupts that could have occured during startup*/ + ulResult = Oct6100ApiClearInterrupts( f_pApiInstance ); + if ( ulResult != cOCT6100_ERR_OK ) + return ulResult; + + /* Configure the interrupt registers. */ + ulResult = Oct6100ApiIsrHwInit( f_pApiInstance, &f_pChipOpen->InterruptConfig ); + if ( ulResult != cOCT6100_ERR_OK ) + return ulResult; } return cOCT6100_ERR_OK; @@ -911,7 +912,7 @@ Description: Read the capacity pins using modified functions from the openchi f_pChipOpen Pointer to chip configuration structure. \*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ -UINT32 Oct6100ApiReadCapacity( IN tPOCT6100_INSTANCE_API f_pApiInstance, +UINT32 Oct6100ApiReadCapacity( IN tPOCT6100_INSTANCE_API f_pApiInstance, IN tPOCT6100_API_GET_CAPACITY_PINS f_pGetCapacityPins) { UINT32 ulResult; @@ -1024,14 +1025,7 @@ UINT32 Oct6100ApiCheckChipConfiguration( if ( f_pChipOpen->ulUpclkFreq != cOCT6100_UPCLK_FREQ_33_33_MHZ ) return cOCT6100_ERR_OPEN_UP_CLK_FREQ; - if ( f_pChipOpen->ulMemClkFreq != cOCT6100_MCLK_FREQ_133_MHZ && - f_pChipOpen->ulMemClkFreq != cOCT6100_MCLK_FREQ_125_MHZ && - f_pChipOpen->ulMemClkFreq != cOCT6100_MCLK_FREQ_117_MHZ && - f_pChipOpen->ulMemClkFreq != cOCT6100_MCLK_FREQ_108_MHZ && - f_pChipOpen->ulMemClkFreq != cOCT6100_MCLK_FREQ_100_MHZ && - f_pChipOpen->ulMemClkFreq != cOCT6100_MCLK_FREQ_92_MHZ && - f_pChipOpen->ulMemClkFreq != cOCT6100_MCLK_FREQ_83_MHZ && - f_pChipOpen->ulMemClkFreq != cOCT6100_MCLK_FREQ_75_MHZ ) + if ( f_pChipOpen->ulMemClkFreq != cOCT6100_MCLK_FREQ_133_MHZ ) return cOCT6100_ERR_OPEN_MEM_CLK_FREQ; if ( f_pChipOpen->fEnableMemClkOut != TRUE && @@ -1046,6 +1040,10 @@ UINT32 Oct6100ApiCheckChipConfiguration( if ( f_pChipOpen->pbyImageFile == NULL ) return cOCT6100_ERR_OPEN_IMAGE_FILE; + ulTempVar = Oct6100ApiCheckImageFileHeader(f_pChipOpen); + if (ulTempVar != cOCT6100_ERR_OK) + return ulTempVar; + /* Check the acoustic echo activation flag. */ if ( f_pChipOpen->fEnableAcousticEcho != TRUE && f_pChipOpen->fEnableAcousticEcho != FALSE ) @@ -1131,6 +1129,10 @@ UINT32 Oct6100ApiCheckChipConfiguration( f_pChipOpen->fEnableExtToneDetection != FALSE ) return cOCT6100_ERR_OPEN_ENABLE_EXT_TONE_DETECTION; + if ( f_pChipOpen->fEnable2100StopEvent != TRUE && + f_pChipOpen->fEnable2100StopEvent != FALSE) + return cOCT6100_ERR_OPEN_ENABLE_2100_STOP_EVENT; + /* Check soft buffer for playout events size. */ if ( ( f_pChipOpen->ulSoftBufferPlayoutEventsBufSize != cOCT6100_INVALID_VALUE ) && ( f_pChipOpen->ulSoftBufferPlayoutEventsBufSize < cOCT6100_MIN_BUFFER_PLAYOUT_EVENT || @@ -1379,6 +1381,7 @@ UINT32 Oct6100ApiCopyChipConfiguration( /* Add 1 to the circular buffer such that all user requested events can fit in the circular queue. */ pSharedInfo->ChipConfig.ulSoftToneEventsBufSize = f_pChipOpen->ulSoftToneEventsBufSize + 1; pSharedInfo->ChipConfig.fEnableExtToneDetection = (UINT8)( f_pChipOpen->fEnableExtToneDetection & 0xFF ); + pSharedInfo->ChipConfig.fEnable2100StopEvent = (UINT8)( f_pChipOpen->fEnable2100StopEvent & 0xFF ); if ( f_pChipOpen->ulSoftBufferPlayoutEventsBufSize != cOCT6100_INVALID_VALUE ) pSharedInfo->ChipConfig.ulSoftBufPlayoutEventsBufSize = f_pChipOpen->ulSoftBufferPlayoutEventsBufSize + 1; @@ -1466,7 +1469,6 @@ UINT32 Oct6100ApiInitializeMiscellaneousVariables( pSharedInfo->ImageInfo.fNlpControl = FALSE; pSharedInfo->ImageInfo.fRinAutoLevelControl = FALSE; pSharedInfo->ImageInfo.fSoutAutoLevelControl = FALSE; - pSharedInfo->ImageInfo.fAlcNoiseBleedOutTime = FALSE; pSharedInfo->ImageInfo.fRinHighLevelCompensation = FALSE; pSharedInfo->ImageInfo.fSoutHighLevelCompensation = FALSE; pSharedInfo->ImageInfo.fAlcHlcStatus = FALSE; @@ -1513,8 +1515,6 @@ UINT32 Oct6100ApiInitializeMiscellaneousVariables( pSharedInfo->ImageInfo.fIdleCodeDetection = TRUE; pSharedInfo->ImageInfo.fIdleCodeDetectionConfiguration = FALSE; pSharedInfo->ImageInfo.fSinLevel = TRUE; - pSharedInfo->ImageInfo.fResetRinAlcOnTones = FALSE; - pSharedInfo->ImageInfo.fResetSoutAlcOnTones = FALSE; pSharedInfo->ImageInfo.usMaxNumberOfChannels = 0; pSharedInfo->ImageInfo.ulToneProfileNumber = cOCT6100_INVALID_VALUE; @@ -1990,6 +1990,34 @@ UINT32 Oct6100ApiGetChipRevisionNum( return cOCT6100_ERR_OK; } +/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*\ + +Function: Oct6100ApiCheckImageFileHeader + +Description: This function check if the image loaded is valid + +------------------------------------------------------------------------------- +| Argument | Description +------------------------------------------------------------------------------- +f_pApiInstance Pointer to API instance. This memory is used to keep the + present state of the chip and all its resources. + +\*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ +UINT32 Oct6100ApiCheckImageFileHeader( + IN tPOCT6100_CHIP_OPEN f_pChipOpen ) +{ + + PUINT8 pszImageInfoStart = NULL; + UINT32 ulStrLen; + + ulStrLen = Oct6100ApiStrLen( (PUINT8)cOCT6100_IMAGE_START_STRING ); + pszImageInfoStart = Oct6100ApiStrStr(f_pChipOpen->pbyImageFile,(PUINT8)cOCT6100_IMAGE_START_STRING, + f_pChipOpen->pbyImageFile + ulStrLen); + if (pszImageInfoStart == NULL) + return cOCT6100_ERR_OPEN_IMAGE_FILE; + + return cOCT6100_ERR_OK; +} /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*\ @@ -2178,7 +2206,7 @@ f_pApiInstance Pointer to API instance. This memory is used to keep the \*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ UINT32 Oct6100ApiBootFc2PllReadCap( - IN tPOCT6100_INSTANCE_API f_pApiInstance, + IN tPOCT6100_INSTANCE_API f_pApiInstance, IN tPOCT6100_API_GET_CAPACITY_PINS f_pGetCapacityPins) { tOCT6100_WRITE_PARAMS WriteParams; @@ -2766,7 +2794,7 @@ f_pApiInstance Pointer to API instance. This memory is used to keep the \*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ UINT32 Oct6100ApiProgramFc1PllReadCap( - IN tPOCT6100_INSTANCE_API f_pApiInstance, + IN tPOCT6100_INSTANCE_API f_pApiInstance, IN tPOCT6100_API_GET_CAPACITY_PINS f_pGetCapacityPins) { tOCT6100_WRITE_PARAMS WriteParams; @@ -3212,7 +3240,7 @@ f_pApiInstance Pointer to API instance. This memory is used to keep the \*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ UINT32 Oct6100ApiCpuRegisterBistReadCap( - IN tPOCT6100_INSTANCE_API f_pApiInstance, + IN tPOCT6100_INSTANCE_API f_pApiInstance, IN tPOCT6100_API_GET_CAPACITY_PINS f_pGetCapacityPins ) { @@ -4426,7 +4454,7 @@ UINT32 Oct6100ApiProgramNLP( { /* Verify if the bist succeeded. */ if ( ( usReadData & 0xFFFF ) != 0x0000 ) - return cOCT6100_ERR_OPEN_FUNCTIONAL_BIST_FAILED; /* Bad chip. */ + return cOCT6100_ERR_OPEN_FUNCTIONAL_BIST_FAILED; ulAfCpuUp = TRUE; } @@ -5260,14 +5288,14 @@ UINT32 Oct6100ApiInitChannels( for( i = 0; i < 6; i++ ) { WriteParams.ulWriteAddress = 0x20000 + ( i * 0x1000 ) + ( 1534 * 2 ); - WriteParams.usWriteData = 0xFF; + WriteParams.usWriteData = 0x3EFF; mOCT6100_DRIVER_WRITE_API( WriteParams, ulResult ); if ( ulResult != cOCT6100_ERR_OK ) return ulResult; WriteParams.ulWriteAddress = 0x20000 + ( i * 0x1000 ) + ( 1535 * 2 ); - WriteParams.usWriteData = 0xFF; + WriteParams.usWriteData = 0x3EFF; mOCT6100_DRIVER_WRITE_API( WriteParams, ulResult ); if ( ulResult != cOCT6100_ERR_OK ) @@ -6684,3 +6712,67 @@ UINT32 Oct6100ApiProductionCrc( return cOCT6100_ERR_OK; } + +/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*\ + +Function: Oct6100ApiClearInterrupts + +Description: Called only by the Oct6100OpenChip function, this function + writes to all register ROLs to clear them. This is necessary + because some ROLs are set during the startup. + +------------------------------------------------------------------------------- +| Argument | Description +------------------------------------------------------------------------------- +IN f_pApiInst Pointer to API instance. This memory is used to keep the + present state of the chip and all its resources. + +\*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ +UINT32 Oct6100ApiClearInterrupts( + IN tPOCT6100_INSTANCE_API f_pApiInstance ) +{ + tPOCT6100_SHARED_INFO pSharedInfo; + tOCT6100_WRITE_PARAMS WriteParams; + UINT32 ulResult; + + /* Get local pointer to shared portion of instance. */ + pSharedInfo = f_pApiInstance->pSharedInfo; + + /* Set the process context and user chip ID parameters once and for all. */ + WriteParams.pProcessContext = f_pApiInstance->pProcessContext; + + WriteParams.ulUserChipId = pSharedInfo->ChipConfig.ulUserChipId; + + WriteParams.ulWriteAddress = 0x102; + WriteParams.usWriteData = cOCT6100_INTRPT_MASK_REG_102H; + mOCT6100_DRIVER_WRITE_API( WriteParams, ulResult ) + if ( ulResult != cOCT6100_ERR_OK ) + return ulResult; + + WriteParams.ulWriteAddress = 0x202; + WriteParams.usWriteData = cOCT6100_INTRPT_MASK_REG_202H; + mOCT6100_DRIVER_WRITE_API( WriteParams, ulResult ) + if ( ulResult != cOCT6100_ERR_OK ) + return ulResult; + + WriteParams.ulWriteAddress = 0x302; + WriteParams.usWriteData = cOCT6100_INTRPT_MASK_REG_302H; + mOCT6100_DRIVER_WRITE_API( WriteParams, ulResult ) + if ( ulResult != cOCT6100_ERR_OK ) + return ulResult; + + WriteParams.ulWriteAddress = 0x502; + WriteParams.usWriteData = cOCT6100_INTRPT_MASK_REG_502H; + mOCT6100_DRIVER_WRITE_API( WriteParams, ulResult ) + if ( ulResult != cOCT6100_ERR_OK ) + return ulResult; + + WriteParams.ulWriteAddress = 0x702; + WriteParams.usWriteData = cOCT6100_INTRPT_MASK_REG_702H; + mOCT6100_DRIVER_WRITE_API( WriteParams, ulResult ) + if ( ulResult != cOCT6100_ERR_OK ) + return ulResult; + + return cOCT6100_ERR_OK; + +} -- cgit v1.2.3