Change WCTDM SPI clock off state polarity and read timing

Change the off state of the SPI clock to high and provide more time for data to
settle out on SPI reads.

(closes issue #15261)
Reported by: alecdavis
Patches:
      wctdm_spi_clocking.diff2.txt uploaded by alecdavis (license 585)
Tested by: alecdavis, dbailey



git-svn-id: http://svn.asterisk.org/svn/dahdi/linux/trunk@7140 a0bf4364-ded3-4de4-8d8a-66a801d63aff

1 files changed, 21 insertions, 12 deletions

diff --git a/drivers/dahdi/wctdm.c b/drivers/dahdi/wctdm.c
index 3bc4e8f..9d81b93 100644
--- a/drivers/dahdi/wctdm.c
+++ b/drivers/dahdi/wctdm.c
@@ -440,10 +440,14 @@ static void wctdm_restart_dma(struct wctdm *wc);
 
 static inline void __write_8bits(struct wctdm *wc, unsigned char bits)
 {
-	/* Drop chip select */
+/*	Out BIT_CS    --\________________________________/----		*/
+/*	Out BIT_SCLK  ---\_/-\_/-\_/-\_/-\_/-\_/-\_/-\_/------		*/
+/*	Out BIT_SDI   ---\___/---\___/---\___/---\___/--------		*/
+/*	Data Bit            7   6   5   4   3   2   1   0		*/
+/*	Data written        0   1   0   1   0   1   0   1		*/
+
 	int x;
-	wc->ios |= BIT_SCLK;
-	outb(wc->ios, wc->ioaddr + WC_AUXD);
+	/* Drop chip select */
 	wc->ios &= ~BIT_CS;
 	outb(wc->ios, wc->ioaddr + WC_AUXD);
 	for (x=0;x<8;x++) {
@@ -454,6 +458,7 @@ static inline void __write_8bits(struct wctdm *wc, unsigned char bits)
 			wc->ios &= ~BIT_SDI;
 		wc->ios &= ~BIT_SCLK;
 		outb(wc->ios, wc->ioaddr + WC_AUXD);
+
 		/* Now raise SCLK high again and repeat */
 		wc->ios |= BIT_SCLK;
 		outb(wc->ios, wc->ioaddr + WC_AUXD);
@@ -462,7 +467,6 @@ static inline void __write_8bits(struct wctdm *wc, unsigned char bits)
 	/* Finally raise CS back high again */
 	wc->ios |= BIT_CS;
 	outb(wc->ios, wc->ioaddr + WC_AUXD);
-	
 }
 
 static inline void __reset_spi(struct wctdm *wc)
@@ -492,31 +496,36 @@ static inline void __reset_spi(struct wctdm *wc)
 
 static inline unsigned char __read_8bits(struct wctdm *wc)
 {
+/*	Out BIT_CS	--\________________________________________/----*/
+/*	Out BIT_SCLK	---\_/--\_/--\_/--\_/--\_/--\_/--\_/--\_/-------*/
+/*	In  BIT_SDO	????/1111\0000/1111\0000/1111\0000/1111\0000/???*/
+/*	Data bit	       7    6    5    4    3    2    1    0	*/
+/*	Data Read	       1    0    1    0    1    0    1    0	*/
+
+/*	Note: Clock High time is 2x Low time, due to input read		*/
+
 	unsigned char res=0, c;
 	int x;
-	wc->ios |= BIT_SCLK;
-	outb(wc->ios, wc->ioaddr + WC_AUXD);
 	/* Drop chip select */
 	wc->ios &= ~BIT_CS;
 	outb(wc->ios, wc->ioaddr + WC_AUXD);
 	for (x=0;x<8;x++) {
 		res <<= 1;
-		/* Get SCLK */
+		/* Drop SCLK */
 		wc->ios &= ~BIT_SCLK;
 		outb(wc->ios, wc->ioaddr + WC_AUXD);
+		/* Now raise SCLK high again */
+		wc->ios |= BIT_SCLK;
+		outb(wc->ios, wc->ioaddr + WC_AUXD);
+
 		/* Read back the value */
 		c = inb(wc->ioaddr + WC_AUXR);
 		if (c & BIT_SDO)
 			res |= 1;
-		/* Now raise SCLK high again */
-		wc->ios |= BIT_SCLK;
-		outb(wc->ios, wc->ioaddr + WC_AUXD);
 	}
 	/* Finally raise CS back high again */
 	wc->ios |= BIT_CS;
 	outb(wc->ios, wc->ioaddr + WC_AUXD);
-	wc->ios &= ~BIT_SCLK;
-	outb(wc->ios, wc->ioaddr + WC_AUXD);
 
 	/* And return our result */
 	return res;