summaryrefslogtreecommitdiff
path: root/software/octdeviceapi/oct6100api/oct6100_api/oct6100_chip_open.c
diff options
context:
space:
mode:
Diffstat (limited to 'software/octdeviceapi/oct6100api/oct6100_api/oct6100_chip_open.c')
-rw-r--r--software/octdeviceapi/oct6100api/oct6100_api/oct6100_chip_open.c26
1 files changed, 19 insertions, 7 deletions
diff --git a/software/octdeviceapi/oct6100api/oct6100_api/oct6100_chip_open.c b/software/octdeviceapi/oct6100api/oct6100_api/oct6100_chip_open.c
index 603ddaa..373edc4 100644
--- a/software/octdeviceapi/oct6100api/oct6100_api/oct6100_chip_open.c
+++ b/software/octdeviceapi/oct6100api/oct6100_api/oct6100_chip_open.c
@@ -2,7 +2,7 @@
File: oct6100_chip_open.c
- Copyright (c) 2001-2007 Octasic Inc.
+ Copyright (c) 2001-2008 Octasic Inc.
Description:
@@ -24,9 +24,9 @@ You should have received a copy of the GNU General Public License
along with the OCT6100 GPL API; if not, write to the Free Software
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
-$Octasic_Release: OCT612xAPI-01.00-PR49 $
+$Octasic_Release: OCT612xAPI-01.01.01 $
-$Octasic_Revision: 347 $
+$Octasic_Revision: 353 $
\*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
@@ -271,6 +271,8 @@ UINT32 Oct6100ChipOpen(
UINT32 ulResult;
UINT32 ulTempVar;
+
+
/* Check user chip configuration parameters for errors. */
ulResult = Oct6100ApiCheckChipConfiguration( f_pChipOpen );
if ( ulResult != cOCT6100_ERR_OK )
@@ -329,6 +331,8 @@ UINT32 Oct6100ChipOpen(
if ( ulResult != cOCT6100_ERR_OK )
return ulResult;
+
+
/* Boot the FC2 PLL. */
ulResult = Oct6100ApiBootFc2Pll( f_pApiInstance );
if ( ulResult != cOCT6100_ERR_OK )
@@ -1191,6 +1195,7 @@ UINT32 Oct6100ApiCheckChipConfiguration(
switch ( f_pChipOpen->ulMemClkFreq )
{
+
case 133000000:
ulTempVar = 672;
break;
@@ -2014,7 +2019,7 @@ UINT32 Oct6100ApiCheckImageFileHeader(
pszImageInfoStart = Oct6100ApiStrStr(f_pChipOpen->pbyImageFile,(PUINT8)cOCT6100_IMAGE_START_STRING,
f_pChipOpen->pbyImageFile + ulStrLen);
if (pszImageInfoStart == NULL)
- return cOCT6100_ERR_OPEN_IMAGE_FILE;
+ return cOCT6100_ERR_OPEN_INVALID_IMAGE_FILE;
return cOCT6100_ERR_OK;
}
@@ -2150,8 +2155,7 @@ UINT32 Oct6100ApiDecodeKeyAndBist(
if ( ulResult != cOCT6100_ERR_OK )
return ulResult;
- /* Either the firmware image was not loaded correctly (from pointer given by user) */
- /* or the channel capacity pins of the chip do not match what the firmware is expecting. */
+ /* The channel capacity pins of the chip do not match what the firmware is expecting. */
if ( ( usReadData & 0x4 ) == 0 )
return cOCT6100_ERR_OPEN_INVALID_FIRMWARE_OR_CAPACITY_PINS;
@@ -2474,6 +2478,7 @@ UINT32 Oct6100ApiBootFc2Pll(
/* Select register configuration based on the memory frequency. */
switch ( f_pApiInstance->pSharedInfo->ChipConfig.ulMemClkFreq )
{
+
case 133000000:
ulFc2PllDivisor = 0x1050;
ulMtDivisor = 0x4300;
@@ -4464,7 +4469,14 @@ UINT32 Oct6100ApiProgramNLP(
ulLoopCounter++;
if ( ulLoopCounter == cOCT6100_MAX_LOOP_CPU_TIMEOUT )
- return cOCT6100_ERR_OPEN_AF_CPU_TIMEOUT;
+ {
+ /* Check if we are trying a short BIST, older images do not support this */
+ if ( (pSharedInfo->ChipConfig.fEnableProductionBist == TRUE) &&
+ (pSharedInfo->ChipConfig.ulProductionBistMode == cOCT6100_PRODUCTION_BIST_SHORT) )
+ return cOCT6100_ERR_NOT_SUPPORTED_PRODUCTION_BIST_SHORT;
+ else
+ return cOCT6100_ERR_OPEN_AF_CPU_TIMEOUT;
+ }
}
/* Return NLP in operationnal mode. */