diff options
author | jim <jim@5390a7c7-147a-4af0-8ec9-7488f05a26cb> | 2004-11-12 21:44:02 +0000 |
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committer | jim <jim@5390a7c7-147a-4af0-8ec9-7488f05a26cb> | 2004-11-12 21:44:02 +0000 |
commit | 82a2ec1d47c4d45d32d663a647f83bda4943bdd1 (patch) | |
tree | df1bbc418b9f5c89db40001bd6d75341ee67feec | |
parent | 6aafabb8088c6fdfdabb413420ace184c0a801a5 (diff) |
Majorly improved I/O efficiency between tor2 board and system.
git-svn-id: http://svn.digium.com/svn/zaptel/trunk@497 5390a7c7-147a-4af0-8ec9-7488f05a26cb
-rwxr-xr-x | tor2.c | 31 |
1 files changed, 29 insertions, 2 deletions
@@ -53,6 +53,10 @@ /* #define ENABLE_TASKLETS */ +/* this stuff needs to work for 64 bit systems, however using the macro causes + it to take twice as long */ +/* #define FIXTHISFOR64 */ /* as of now, un-comment for 32 bit only system */ + #define SPANS_PER_CARD 4 #define MAX_SPANS 16 @@ -131,6 +135,8 @@ static void tor2_tasklet(unsigned long data); #endif #define GPIOC (PLX_LOC_GPIOC >> 1) /* word-oriented address for PLX GPIOC reg. (32 bit reg.) */ +#define LAS2BRD (0x30 >> 1) +#define LAS3BRD (0x34 >> 1) #define INTCSR (0x4c >> 1) /* word-oriented address for PLX INTCSR reg. */ #define PLX_INTENA 0x43 /* enable, hi-going, level trigger */ @@ -356,8 +362,8 @@ static int __devinit tor2_probe(struct pci_dev *pdev, const struct pci_device_id int res,x,f; struct tor2 *tor; unsigned long endjif; - volatile unsigned long *gpdata_io; - unsigned long gpdata; + volatile unsigned long *gpdata_io,*lasdata_io; + unsigned long gpdata,lasdata; res = pci_enable_device(pdev); if (res) @@ -508,6 +514,19 @@ static int __devinit tor2_probe(struct pci_dev *pdev, const struct pci_device_id tor->mem8[CTLREG1] = 0; tor->mem8[LEDREG] = 0; + /* set the LA2BRD register so that we enable block transfer, read + pre-fetch, and set to maximum read pre-fetch size */ + lasdata_io = (unsigned long *)&tor->plx[LAS2BRD]; + lasdata = *lasdata_io; + lasdata |= 0x39; + *lasdata_io = lasdata; + + /* set the LA3BRD register so that we enable block transfer */ + lasdata_io = (unsigned long *)&tor->plx[LAS3BRD]; + lasdata = *lasdata_io; + lasdata |= 1; + *lasdata_io = lasdata; + /* check part revision data */ x = t1in(tor,1,0xf) & 15; #ifdef NONREVA @@ -1209,7 +1228,11 @@ static void tor2_intr(int irq, void *dev_id, struct pt_regs *regs) /* span 4 */ txword |= tor->spans[3].chans[n].writechunk[i]; /* write to part */ +#ifdef FIXTHISFOR64 + tor->mem32[tor->datxlt[n] + (32 * i)] = txword; +#else tor->mem32[tor->datxlt[n] + (32 * i)] = cpu_to_le32(txword); +#endif } } @@ -1217,7 +1240,11 @@ static void tor2_intr(int irq, void *dev_id, struct pt_regs *regs) for (n = 0; n < tor->spans[0].channels; n++) { for (i = 0; i < ZT_CHUNKSIZE; i++) { /* read from */ +#ifdef FIXTHISFOR64 + rxword = tor->mem32[tor->datxlt[n] + (32 * i)]; +#else rxword = le32_to_cpu(tor->mem32[tor->datxlt[n] + (32 * i)]); +#endif /* span 1 */ tor->spans[0].chans[n].readchunk[i] = rxword >> 24; /* span 2 */ |