diff options
author | kpfleming <kpfleming@5390a7c7-147a-4af0-8ec9-7488f05a26cb> | 2006-11-08 23:09:33 +0000 |
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committer | kpfleming <kpfleming@5390a7c7-147a-4af0-8ec9-7488f05a26cb> | 2006-11-08 23:09:33 +0000 |
commit | 8b53cf2033fff09f8e3ac49eb3c919502109c43e (patch) | |
tree | 1320929c4d7d53c8ab2842ecae0daf1eafe5e75a /wcte11xp.c | |
parent | 911b390063c9c99a3c79a7e60d1dbc43acb06902 (diff) |
Merged revisions 1574 via svnmerge from
https://origsvn.digium.com/svn/zaptel/branches/1.4
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r1574 | kpfleming | 2006-11-08 17:06:17 -0600 (Wed, 08 Nov 2006) | 11 lines
Merged revisions 1573 via svnmerge from
https://origsvn.digium.com/svn/zaptel/branches/1.2
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r1573 | kpfleming | 2006-11-08 17:04:33 -0600 (Wed, 08 Nov 2006) | 3 lines
clean up recent VPMOCT changes
add support for Infineon FALC rev 2.2
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git-svn-id: http://svn.digium.com/svn/zaptel/trunk@1575 5390a7c7-147a-4af0-8ec9-7488f05a26cb
Diffstat (limited to 'wcte11xp.c')
-rw-r--r-- | wcte11xp.c | 45 |
1 files changed, 11 insertions, 34 deletions
@@ -628,7 +628,7 @@ static void t4_serial_setup(struct t1 *wc) { printk("TE110P: Setting up global serial parameters for %s %s\n", wc->spantype == TYPE_E1 ? (unchannelized ? "Unchannelized E1" : "E1") : "T1", - wc->spanflags & FLAG_FALC12 ? "FALC V1.2" : "FALC V2.1"); + wc->spanflags & FLAG_FALC12 ? "FALC V1.2" : "FALC V2.2"); t1_framer_out(wc, 0x85, 0xe0); /* GPC1: Multiplex mode enabled, FSC is output, active low, RCLK from channel 0 */ t1_framer_out(wc, 0x08, 0x05); /* IPC: Interrupt push/pull active low */ if (wc->spanflags & FLAG_FALC12) { @@ -639,38 +639,15 @@ static void t4_serial_setup(struct t1 *wc) t1_framer_out(wc, 0x96, 0x03); t1_framer_out(wc, 0x97, 0x10); } else { -#ifdef TRUST_INFINEON_ERRATA - if (wc->spantype == TYPE_E1) { - /* Global clocks (8.192 Mhz CLK) */ - t1_framer_out(wc, 0x92, 0x00); - t1_framer_out(wc, 0x93, 0x00); - t1_framer_out(wc, 0x94, 0x00); - t1_framer_out(wc, 0x95, 0x00); - t1_framer_out(wc, 0x96, 0x00); - t1_framer_out(wc, 0x97, 0x0F); - t1_framer_out(wc, 0x98, 0x80); - t1_framer_out(wc, 0x99, 0x00); - } else { - /* Global clocks (8.192 Mhz CLK) */ - t1_framer_out(wc, 0x92, 0x00); - t1_framer_out(wc, 0x93, 0x10); - t1_framer_out(wc, 0x94, 0xfb); - t1_framer_out(wc, 0x95, 0x03); - t1_framer_out(wc, 0x96, 0x00); - t1_framer_out(wc, 0x97, 0x0b); - t1_framer_out(wc, 0x98, 0x8c); - t1_framer_out(wc, 0x99, 0x80); - } -#else - t1_framer_out(wc, 0x92, 0x66); - t1_framer_out(wc, 0x93, 0x0e); - t1_framer_out(wc, 0x94, 0x3f); - t1_framer_out(wc, 0x95, 0x0f); - t1_framer_out(wc, 0x96, 0x04); - t1_framer_out(wc, 0x97, 0x3c); - t1_framer_out(wc, 0x98, 0x9c); - t1_framer_out(wc, 0x99, 0x90); -#endif + /* Global clocks (8.192 Mhz CLK) */ + t1_framer_out(wc, 0x92, 0x00); + t1_framer_out(wc, 0x93, 0x18); + t1_framer_out(wc, 0x94, 0xfb); + t1_framer_out(wc, 0x95, 0x0b); + t1_framer_out(wc, 0x96, 0x00); + t1_framer_out(wc, 0x97, 0x0b); + t1_framer_out(wc, 0x98, 0xdb); + t1_framer_out(wc, 0x99, 0xdf); } /* Configure interrupts */ t1_framer_out(wc, 0x46, 0x40); /* GCR: Interrupt on Activation/Deactivation of AIX, LOS */ @@ -687,7 +664,7 @@ static void t4_serial_setup(struct t1 *wc) if (wc->spanflags & FLAG_FALC12) t1_framer_out(wc, 0x25, 0x04); /* RC1: The rest of RC0 */ else - t1_framer_out(wc, 0x25, 0x06); /* RC1: The rest of RC0 */ + t1_framer_out(wc, 0x25, 0x05); /* RC1: The rest of RC0 */ /* Configure ports */ t1_framer_out(wc, 0x80, 0x00); /* PC1: SPYR/SPYX input on RPA/XPA */ |