r1557@boole: tzafrir | 2006-11-06 20:12:16 +0200

 Merging xpp driver release 1.2 (rev. 2569), originally team/tzafrir/xpp_1.2
  * Should build well. Almost final.
  * genzaptelconf: Also work when zap_autoreg=0
  * README.Astribank updated for rev. 1.2.
  * xpp/utils/Makefile: Use $< with cc -c
  * Get xpp/utils configuration from autoconf (without changesin top dir)


git-svn-id: http://svn.digium.com/svn/zaptel/trunk@1563 5390a7c7-147a-4af0-8ec9-7488f05a26cb

1 files changed, 73 insertions, 94 deletions

diff --git a/xpp/calibrate_slics b/xpp/calibrate_slics
index f5b45f3..72ca202 100755
--- a/xpp/calibrate_slics
+++ b/xpp/calibrate_slics
@@ -1,7 +1,7 @@
 #!/usr/bin/perl -w
 
 #
-# $Id:$
+# $Id$
 #
 
 use strict;
@@ -22,7 +22,6 @@ sub logger($) {
 
 sub write_to_slic_file($) {
 	my $write_str = shift;
-	#print STDERR "[Writing string]\n".$write_str."[End String]\n";
 
 	open(SLICS,">$SlicsFile") or 
 		die("Failed writing to slics file $SlicsFile");
@@ -38,19 +37,19 @@ sub read_reg($$$) {
 	my $direct = shift;
 	
 	write_to_slic_file(
-		sprintf("%02x 00 00 00 R%s %02X", 
-			1<<$read_slic, $direct, $read_reg));
+		sprintf("%d R%s %02X", $read_slic, $direct, $read_reg));
 	sleep(0.001);
 	open(SLICS,$SlicsFile) or 
 		die("Failed reading from slics file $SlicsFile");
+	#awk '/^SLIC_REPLY:/{print $5}' $SLICS | cut -dx -f2
 	my @reply = ();
 	while(<SLICS>){
-		#if (/^[^#]/) {
+		#if (/^ /) {
 		#	print STDERR "answer line: $_";
 		#}
-		if (/^SLIC_REPLY:\s+[DI]\s+reg_num=0x[[:xdigit:]]+,\s+dataH=0x([[:xdigit:]]+)\s+dataL=0x([[:xdigit:]]+)/){
+		if (/^ \d*\s+[RW][DIS]\s+[[:xdigit:]]+\s+([[:xdigit:]]+)\s+([[:xdigit:]]+)/){
 			@reply = (hex($1), hex($2)); 
-			#print STDERR "got [@reply]\n";
+			#print STDERR "got [$reply]\n";
 			last;
 		}
 	}
@@ -58,7 +57,7 @@ sub read_reg($$$) {
 	if ($direct eq 'I') {
 		return @reply;
 	} else {
-		return $reply[1];
+		return $reply[0];
 	}
 }
 
@@ -70,28 +69,11 @@ sub write_reg{#($$$$$) {
 	my $reg_val_low = shift;
 	my $reg_val_hi = shift;
 	
-	my $str  = sprintf "%02x 00 00 00 W%s %02X %02X", 
-		1<<$read_slic, $direct, $read_reg, $reg_val_low;
+	my $str  = sprintf "%d W%s %02X %02X", 
+		$read_slic, $direct, $read_reg, $reg_val_low;
 	if ($direct eq 'I') {
 		$str .= sprintf " %02X", $reg_val_hi;
 	}
-	#printf STDERR "Writing: $str\n";
-	write_to_slic_file($str);
-}
-
-# TODO: rearange arguments
-sub write_reg_all_slics{#($$$$) {
-	my $read_reg = shift;
-	my $direct = shift;
-	my $reg_val_low = shift;
-	my $reg_val_hi = shift;
-	
-	my $str  = sprintf "FF FF 00 00 W%s %02X %02X", 
-		$direct, $read_reg, $reg_val_low;
-	if ($direct eq 'I') {
-		$str .= sprintf " %02X", $reg_val_hi;
-	}
-	printf STDERR "Writing: $str\n";
 	write_to_slic_file($str);
 }
 
@@ -107,81 +89,81 @@ sub log_calib_params() {
 
 sub init_indirect_registers() {
 	return write_to_slic_file("#
-FF FF 00 00	WI	00	C2	55
-FF FF 00 00	WI	01	E6	51
-FF FF 00 00	WI	02	85	4B
-FF FF 00 00	WI	03	37	49
+31	WI	00	C2	55
+31	WI	01	E6	51
+31	WI	02	85	4B
+31	WI	03	37	49
                           
-FF FF 00 00	WI	04	33	33
-FF FF 00 00	WI	05	02	02
-FF FF 00 00	WI	06	02	02
-FF FF 00 00	WI	07	98	01
+31	WI	04	33	33
+31	WI	05	02	02
+31	WI	06	02	02
+31	WI	07	98	01
                           
-FF FF 00 00	WI	08	98	01
-FF FF 00 00	WI	09	11	06
-FF FF 00 00	WI	0A	02	02
-FF FF 00 00	WI	0B	E5	00
+31	WI	08	98	01
+31	WI	09	11	06
+31	WI	0A	02	02
+31	WI	0B	E5	00
                           
-FF FF 00 00	WI	0C	1C	0A
-FF FF 00 00	WI	0D	30	7B
-FF FF 00 00	WI	0E	63	00
-FF FF 00 00	WI	0F	00	00
+31	WI	0C	1C	0A
+31	WI	0D	30	7B
+31	WI	0E	63	00
+31	WI	0F	00	00
                           
-FF FF 00 00	WI	10	70	78
-FF FF 00 00	WI	11	7D	00
-FF FF 00 00	WI	12	00	00
-FF FF 00 00	WI	13	00	00
+31	WI	10	70	78
+31	WI	11	7D	00
+31	WI	12	00	00
+31	WI	13	00	00
                           
-FF FF 00 00	WI	14	F0	7E
-FF FF 00 00	WI	15	60	01
-FF FF 00 00	WI	16	00	00
-FF FF 00 00	WI	17	00	20
+31	WI	14	F0	7E
+31	WI	15	60	01
+31	WI	16	00	00
+31	WI	17	00	20
                           
-FF FF 00 00	WI	18	00	20
-FF FF 00 00	WI	19	00	00
-FF FF 00 00	WI	1A	00	20
-FF FF 00 00	WI	1B	00	40
+31	WI	18	00	20
+31	WI	19	00	00
+31	WI	1A	00	20
+31	WI	1B	00	40
                           
-FF FF 00 00	WI	1C	00	10
-FF FF 00 00	WI	1D	00	36
-FF FF 00 00	WI	1E	00	10
-FF FF 00 00	WI	1F	00	02
+31	WI	1C	00	10
+31	WI	1D	00	36
+31	WI	1E	00	10
+31	WI	1F	00	02
                           
-FF FF 00 00	WI	20	C0	07
-FF FF 00 00	WI	21	00	26
-FF FF 00 00	WI	22	F4	0F
-FF FF 00 00	WI	23	00	80
+31	WI	20	C0	07
+31	WI	21	00	26
+31	WI	22	F4	0F
+31	WI	23	00	80
 
-#FF FF 00 00	WI	24	20	03
-#FF FF 00 00	WI	25	8C	08
-#FF FF 00 00	WI	26	00	01
-#FF FF 00 00	WI	27	10	00
+#31	WI	24	20	03
+#31	WI	25	8C	08
+#31	WI	26	00	01
+#31	WI	27	10	00
                           
-FF FF 00 00	WI	24	00	08
-FF FF 00 00	WI	25	00	08
-FF FF 00 00	WI	26	00	08
-FF FF 00 00	WI	27	00	08
+31	WI	24	00	08
+31	WI	25	00	08
+31	WI	26	00	08
+31	WI	27	00	08
                           
-FF FF 00 00	WI	28	00	0C
-FF FF 00 00	WI	29	00	0C
-FF FF 00 00	WI	2B	00	01
+31	WI	28	00	0C
+31	WI	29	00	0C
+31	WI	2B	00	01
                           
-FF FF 00 00	WI	63	DA	00
-FF FF 00 00	WI	64	60	6B
-FF FF 00 00	WI	65	74	00
-FF FF 00 00	WI	66	C0	79
+31	WI	63	DA	00
+31	WI	64	60	6B
+31	WI	65	74	00
+31	WI	66	C0	79
                           
-FF FF 00 00	WI	67	20	11
-FF FF 00 00	WI	68	E0	3B	
+31	WI	67	20	11
+31	WI	68	E0	3B	
 #");
 }
 
 sub init_early_direct_regs() {
 	return write_to_slic_file("#
-FF FF 00 00	WD	08 00
-FF FF 00 00	WD	4A 34
-FF FF 00 00	WD	4B 10
-FF FF 00 00	WD	40 00
+31	WD	08 00
+31	WD	4A 34
+31	WD	4B 10
+31	WD	40	00
 #")
 }
 
@@ -221,7 +203,7 @@ sub manual_calibrate_loop($$) {
 	
 	# start calibration:
 	my $calibration_in_progress = 1;
-	write_reg_all_slics($write_reg, 'D', 0x1F);
+	write_reg(31, $write_reg, 'D', 0x1F);
 	sleep $ManualCalibrationSleepTime;
 	
 	# wait until all slics have finished calibration, or for timeout
@@ -256,9 +238,9 @@ sub auto_calibrate($$) {
 	# start calibration:
 	write_to_slic_file(
 		sprintf
-			"FF FF 00 00	WD 61 %02X\n".
-			"FF FF 00 00	WD 60 %02X\n".
-			"", $calib_97, $calib_96
+			"31 WD 61 %02X\n".
+			"31 WD 60 %02X\n".
+			"", $calib_96, $calib_97
 			
 	);
 	# wait until all slics have finished calibration, or for timeout
@@ -267,19 +249,16 @@ sub auto_calibrate($$) {
 	CALIB_LOOP: for my $slic (@SlicNums) {
 		logger("checking slic $slic");
 		while(1) {
-			my $reply;
-			if (($reply=read_reg($slic, 96, 'D')) == 0) {
+			if ((read_reg($slic, 60, 'D')) == 0) {
 				# move to next register
 				logger("slic $slic calibrated");
 				last;
 			}
-			print STDERR "reply: $reply\n";
 			my $time=time();
 			if ( $time > $end_time) {
 				$timeout=1;
-				logger("Exiting on timeout: $time is after timeout $end_time .");
-				exit 1;
-				#last CALIB_LOOP;
+				logger("Exiting on timeout: $end_time < $time.");
+				last CALIB_LOOP;
 			}
 			logger("auto_calibrate not done yet: slic #$slic\n");
 			sleep(0.1);