Enable CAS in TE410P when the user configures the E1 circuit with it.

git-svn-id: http://svn.digium.com/svn/zaptel/trunk@253 5390a7c7-147a-4af0-8ec9-7488f05a26cb

1 files changed, 3 insertions, 1 deletions

diff --git a/wct4xxp.c b/wct4xxp.c
index 9ef7725..8e1436e 100755
--- a/wct4xxp.c
+++ b/wct4xxp.c
@@ -710,6 +710,7 @@ static void __t4_configure_t1(struct t4 *wc, int unit, int lineconfig, int txlev
 static void __t4_configure_e1(struct t4 *wc, int unit, int lineconfig)
 {
 	unsigned int fmr2, fmr1, fmr0;
+	unsigned int cas = 0;
 	char *crc4 = "";
 	char *framing, *line;
 	fmr1 = 0x44; /* FMR1: E1 mode, Automatic force resync, PCM30 mode, 8.192 Mhz backplane, no XAIS */
@@ -736,6 +737,7 @@ static void __t4_configure_e1(struct t4 *wc, int unit, int lineconfig)
 		framing = "CCS";
 	} else {
 		framing = "CAS";
+		cas = 0x40;
 	}
 	__t4_framer_out(wc, unit, 0x1c, fmr0);
 
@@ -764,7 +766,7 @@ static void __t4_configure_e1(struct t4 *wc, int unit, int lineconfig)
 	__t4_framer_out(wc, unit, 0x39, 0x15);	/* PCR: 22 "ones" clear LOS */
 	
 	__t4_framer_out(wc, unit, 0x20, 0x9f);	/* XSW: Spare bits all to 1 */
-	__t4_framer_out(wc, unit, 0x21, 0x1c);	/* XSP: E-bit set when async. AXS auto, XSIF to 1 */
+	__t4_framer_out(wc, unit, 0x21, 0x1c|cas);	/* XSP: E-bit set when async. AXS auto, XSIF to 1 */
 	
 	
 	/* Generate pulse mask for E1 */